From 170b6bcb7e3676acb4bb11b075a70000c45c4f49 Mon Sep 17 00:00:00 2001 From: SashegDev Date: Mon, 14 Sep 2026 10:56:27 +0000 Subject: [PATCH] uni: trap prints r8-r12 --- tools/sbl_uni.py | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tools/sbl_uni.py b/tools/sbl_uni.py index e54ac1d..ad38f10 100644 --- a/tools/sbl_uni.py +++ b/tools/sbl_uni.py @@ -13,11 +13,16 @@ from unicorn import (Uc, UC_ARCH_ARM, UC_MODE_THUMB, UC_HOOK_MEM_UNMAPPED, UC_HOOK_MEM_WRITE, UC_HOOK_CODE) from unicorn.arm_const import (UC_ARM_REG_R0, UC_ARM_REG_R1, UC_ARM_REG_R2, UC_ARM_REG_R3, UC_ARM_REG_R4, UC_ARM_REG_R5, - UC_ARM_REG_R6, UC_ARM_REG_R7, UC_ARM_REG_SP, + UC_ARM_REG_R6, UC_ARM_REG_R7, UC_ARM_REG_R8, + UC_ARM_REG_R9, UC_ARM_REG_R10, + UC_ARM_REG_R11, UC_ARM_REG_R12, + UC_ARM_REG_SP, UC_ARM_REG_LR, UC_ARM_REG_PC, UC_ARM_REG_CPSR) _REGS = (UC_ARM_REG_R0, UC_ARM_REG_R1, UC_ARM_REG_R2, UC_ARM_REG_R3, UC_ARM_REG_R4, UC_ARM_REG_R5, UC_ARM_REG_R6, UC_ARM_REG_R7) +_REGS_HI = (UC_ARM_REG_R8, UC_ARM_REG_R9, UC_ARM_REG_R10, UC_ARM_REG_R11, + UC_ARM_REG_R12) RAMS = [ (0x00000000, 0x00001000), # zero page (QEMU-compat: [0] writes succeed) @@ -196,9 +201,11 @@ def main(): if _traps and addr in _traps: try: vals = [mu.reg_read(_REGS[i]) for i in range(8)] + hiv = [mu.reg_read(_REGS_HI[i]) for i in range(5)] except Exception: vals = [] - print(f"TRAP {addr:#x} insn#{count[0]} r0-r7={[hex(x) for x in vals]} sp={mu.reg_read(UC_ARM_REG_SP):#x} lr={mu.reg_read(_LR):#x}") + hiv = [] + print(f"TRAP {addr:#x} insn#{count[0]} r0-r7={[hex(x) for x in vals]} r8-r12={[hex(x) for x in hiv]} sp={mu.reg_read(UC_ARM_REG_SP):#x} lr={mu.reg_read(_LR):#x}") try: print(f" [73A100]={bytes(mu.mem_read(0x073A100, 4)).hex()}") except Exception as e: