From b6777cb318747ea068f760434398d6b6d56a0efd Mon Sep 17 00:00:00 2001
From: SashegDev <gdsasheg@gmail.com>
Date: Mon, 7 Sep 2026 09:13:58 +0000
Subject: [PATCH] saimaa: uart plain stdout

---
 qemu/saimaa.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/qemu/saimaa.c b/qemu/saimaa.c
index 482899e..06c17c7 100644
--- a/qemu/saimaa.c
+++ b/qemu/saimaa.c
@@ -43,7 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(SaimaaUartState, SAIMAA_UART)
 struct SaimaaUartState {
     SysBusDevice parent_obj;
     MemoryRegion iomem;
-    CharBackend chr;
+    /* WIP: plain host stdout, no chardev dance */
 };
 
 static uint64_t saimaa_uart_read(void *opaque, hwaddr off, unsigned size)
@@ -64,9 +64,10 @@ static void saimaa_uart_write(void *opaque, hwaddr off, uint64_t val,
                               unsigned size)
 {
     SaimaaUartState *s = SAIMAA_UART(opaque);
+    (void)s;
     if (off == 0x70) { /* UARTDM_TF */
-        uint8_t ch = val & 0xff;
-        qemu_chr_fe_write_all(&s->chr, &ch, 1);
+        putchar(val & 0xff);
+        fflush(stdout);
         return;
     }
     qemu_log_mask(LOG_GUEST_ERROR,
@@ -144,12 +145,10 @@ static void saimaa_machine_init(MachineState *machine)
     sysbus_mmio_map(SYS_BUS_DEVICE(gic), 0, SAIMAA_GICD_BASE);
     sysbus_mmio_map(SYS_BUS_DEVICE(gic), 1, SAIMAA_GICC_BASE);
 
-    /* UART: stdio (direct backend, no property dance) */
+    /* UART at MSM address */
     DeviceState *uart = qdev_new(TYPE_SAIMAA_UART);
     sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal);
     sysbus_mmio_map(SYS_BUS_DEVICE(uart), 0, SAIMAA_UART_BASE);
-    qemu_chr_fe_init(&SAIMAA_UART(uart)->chr, serial_hd(0),
-                     &error_abort);
 
     /* SDHCI + eMMC image */
     DeviceState *sdhci = qdev_new(TYPE_SYSBUS_SDHCI);