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saimaa: uart plain stdout

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SashegDev
2026-09-07 09:13:58 +00:00
parent 60f79da7f0
commit b6777cb318
1 changed files with 5 additions and 6 deletions
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qemu/saimaa.c
+5 -6
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@@ -43,7 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(SaimaaUartState, SAIMAA_UART)
struct SaimaaUartState { struct SaimaaUartState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
MemoryRegion iomem; MemoryRegion iomem;
CharBackend chr; /* WIP: plain host stdout, no chardev dance */
}; };
static uint64_t saimaa_uart_read(void *opaque, hwaddr off, unsigned size) static uint64_t saimaa_uart_read(void *opaque, hwaddr off, unsigned size)
@@ -64,9 +64,10 @@ static void saimaa_uart_write(void *opaque, hwaddr off, uint64_t val,
unsigned size) unsigned size)
{ {
SaimaaUartState *s = SAIMAA_UART(opaque); SaimaaUartState *s = SAIMAA_UART(opaque);
(void)s;
if (off == 0x70) { /* UARTDM_TF */ if (off == 0x70) { /* UARTDM_TF */
uint8_t ch = val & 0xff; putchar(val & 0xff);
qemu_chr_fe_write_all(&s->chr, &ch, 1); fflush(stdout);
return; return;
} }
qemu_log_mask(LOG_GUEST_ERROR, qemu_log_mask(LOG_GUEST_ERROR,
@@ -144,12 +145,10 @@ static void saimaa_machine_init(MachineState *machine)
sysbus_mmio_map(SYS_BUS_DEVICE(gic), 0, SAIMAA_GICD_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(gic), 0, SAIMAA_GICD_BASE);
sysbus_mmio_map(SYS_BUS_DEVICE(gic), 1, SAIMAA_GICC_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(gic), 1, SAIMAA_GICC_BASE);
/* UART: stdio (direct backend, no property dance) */ /* UART at MSM address */
DeviceState *uart = qdev_new(TYPE_SAIMAA_UART); DeviceState *uart = qdev_new(TYPE_SAIMAA_UART);
sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal); sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(uart), 0, SAIMAA_UART_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(uart), 0, SAIMAA_UART_BASE);
qemu_chr_fe_init(&SAIMAA_UART(uart)->chr, serial_hd(0),
&error_abort);
/* SDHCI + eMMC image */ /* SDHCI + eMMC image */
DeviceState *sdhci = qdev_new(TYPE_SYSBUS_SDHCI); DeviceState *sdhci = qdev_new(TYPE_SYSBUS_SDHCI);