saimaa: uart plain stdout
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+5
-6
@@ -43,7 +43,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(SaimaaUartState, SAIMAA_UART)
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struct SaimaaUartState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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CharBackend chr;
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/* WIP: plain host stdout, no chardev dance */
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};
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static uint64_t saimaa_uart_read(void *opaque, hwaddr off, unsigned size)
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@@ -64,9 +64,10 @@ static void saimaa_uart_write(void *opaque, hwaddr off, uint64_t val,
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unsigned size)
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{
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SaimaaUartState *s = SAIMAA_UART(opaque);
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(void)s;
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if (off == 0x70) { /* UARTDM_TF */
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uint8_t ch = val & 0xff;
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qemu_chr_fe_write_all(&s->chr, &ch, 1);
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putchar(val & 0xff);
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fflush(stdout);
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return;
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}
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qemu_log_mask(LOG_GUEST_ERROR,
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@@ -144,12 +145,10 @@ static void saimaa_machine_init(MachineState *machine)
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sysbus_mmio_map(SYS_BUS_DEVICE(gic), 0, SAIMAA_GICD_BASE);
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sysbus_mmio_map(SYS_BUS_DEVICE(gic), 1, SAIMAA_GICC_BASE);
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/* UART: stdio (direct backend, no property dance) */
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/* UART at MSM address */
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DeviceState *uart = qdev_new(TYPE_SAIMAA_UART);
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sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal);
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sysbus_mmio_map(SYS_BUS_DEVICE(uart), 0, SAIMAA_UART_BASE);
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qemu_chr_fe_init(&SAIMAA_UART(uart)->chr, serial_hd(0),
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&error_abort);
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/* SDHCI + eMMC image */
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DeviceState *sdhci = qdev_new(TYPE_SYSBUS_SDHCI);
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