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44 Commits

Author SHA1 Message Date
lumia-emu 8aef555346 b38: S21 table-walker router 2026-09-14 00:34:52 +00:00
lumia-emu d3e2efe7ba maze v2: reject even lr (no ARM drift) 2026-09-14 00:30:18 +00:00
lumia-emu 3d011f2994 S12v7: drop add-sp (marched) 2026-09-14 00:28:20 +00:00
lumia-emu 785eb934e6 scratch to OCIMEM (out of march) 2026-09-14 00:27:02 +00:00
lumia-emu 4fcb316c99 b37: S20 clock-dispatcher router 2026-09-14 00:24:47 +00:00
lumia-emu 8ce95238e0 b36: fix 9A2 exp bytes 2026-09-14 00:21:14 +00:00
lumia-emu f46e4e94fe b36: assert-entry to S19 2026-09-14 00:20:51 +00:00
lumia-emu 9187bdcff0 b35: sbl_mc hangs to S19 2026-09-14 00:19:33 +00:00
lumia-emu 5362f0a6f8 IMEM tripwire 4B 2026-09-14 00:17:06 +00:00
lumia-emu 503c334b2e IMEM tripwire (poison broke stack) 2026-09-14 00:15:36 +00:00
lumia-emu 2a3bdcd72d b34: hang neutralize 2026-09-14 00:14:29 +00:00
lumia-emu d0a62a86c8 bake table-root fabrication 2026-09-14 00:12:29 +00:00
lumia-emu 66b1721b7a b33: partition wrap-check 2026-09-14 00:11:45 +00:00
lumia-emu ae9ad07370 b32: logger-tail b.w 2026-09-14 00:08:58 +00:00
lumia-emu 308e8aa2af b31: logger-epilogue NOP 2026-09-14 00:06:48 +00:00
lumia-emu 110a60562c b30: epilogue blx via BLX2BL 2026-09-14 00:03:57 +00:00
lumia-emu 8cd7c85771 S12v6: add-sp un-leak in-stub 2026-09-14 00:01:45 +00:00
SashegDev dcfdeef917 tools: add sled (zero-drift) detector + capstone disassembly history in trap handler 2026-09-13 18:11:25 +00:00
SashegDev b5671fbbd7 IMEM poison drift-trap 2026-09-13 12:25:25 +00:00
SashegDev b7de1d80e0 b29: S18 poll-epilogue router 2026-09-13 12:23:15 +00:00
SashegDev 0863405819 b28: poll-epilogue march kill 2026-09-13 12:21:50 +00:00
SashegDev 757e74fb4f S12v5: r7 restore in-stub 2026-09-13 12:20:35 +00:00
SashegDev 68fab44137 S12v4 smart dispatcher baked 2026-09-13 12:16:43 +00:00
SashegDev 47e78ee42f S16v4: reject STUBV return 2026-09-13 12:15:25 +00:00
SashegDev 80ee6d1bf3 S16v3: add sp un-leak 2026-09-13 12:13:59 +00:00
SashegDev 9cd903c34d b27: poll re-init skip + bits pref-set 2026-09-13 12:12:51 +00:00
SashegDev 8b1eaeba18 b26: S17 safe-logger baked 2026-09-13 12:08:22 +00:00
SashegDev 13b314e9cf b25: S12v3/S16v2 smart-return baked 2026-09-13 12:05:17 +00:00
SashegDev c875e8712f b25: S12v2-full + B66-ELF + S16 baked 2026-09-13 12:01:19 +00:00
SashegDev 15eeba929d b24 scaffold: S12 + poll-bit2 baked, default b24 2026-09-13 11:37:15 +00:00
SashegDev d2d180feac b24: world-switch stub + clock S11 2026-09-13 11:29:17 +00:00
SashegDev b06f009dd0 b23: parity docs, run-sbl default b23 2026-09-13 10:40:29 +00:00
SashegDev 95b98054b3 b23: S10 + table poke + S9 baked 2026-09-13 10:37:18 +00:00
SashegDev 9c45d06ed2 b22: bake 6BE->S9 patch 2026-09-13 10:32:06 +00:00
SashegDev f2510065ea b22: rollback NOP + S9v3 baked (sp reset) 2026-09-13 10:31:40 +00:00
SashegDev c29860618f b21: logger S8 (pop.w -> bx lr) 2026-09-13 10:25:22 +00:00
SashegDev 8d05bebc0c run-sbl default b18 2026-09-13 00:23:42 +00:00
SashegDev 615574fa6f b18 parity: docs, run-sbl, vec/dstub logging 2026-09-13 00:23:21 +00:00
SashegDev 8d5657d5a2 b18: single 6B idiom NOP (order fix) 2026-09-13 00:19:10 +00:00
SashegDev 6de5a47b34 b18: NOP full bl idiom (dangling prefix fix) 2026-09-13 00:18:14 +00:00
SashegDev 4bd9997412 saimaa: vec maze+sctlr logging 2026-09-13 00:10:23 +00:00
SashegDev 9e63dfc258 saimaa: fix cp15 reg names 2026-09-13 00:08:17 +00:00
SashegDev 1e271b6d53 saimaa: log DFAR/IFSR/DFSR in vec trap 2026-09-13 00:07:29 +00:00
SashegDev 62f32be733 saimaa: vec serves maze to Thumb (null-fetch parity) 2026-09-13 00:04:55 +00:00
5 changed files with 2385 additions and 45 deletions
+142
View File
@@ -64,3 +64,145 @@
Фронтир b18: sbl_main возвращается, новый код `0x801Bxxx`
(`strb [r7,#2]`-паттерн, b17-NOP на 0x801B71E), падеж pop'ом пустого
стека у верха IMEM — следующий фронт.
## b18 parity (QEMU == uni, 2026-09-12)
- QEMU поправлен до паритета: dstub-overlay + vec-maze для Thumb
(null-fetch исполняет maze и возвращается) + убран висячий префикс
bl (bogus odd store -> alignment fault, DFAR=0x8006B8D).
- QEMU b18 доходит до того же фронтира, что uni b18 (38961 инстр.):
`0x801Bxxx`, r1=0x80522A4, r2/r3=STUBV, lr=0x801B73F, sp марширует
к верху IMEM. Смерти чуть различаются по таймингу (uni: read
0x8610000; QEMU: null-jump → maze-hang c lr-top 0x80), регион тот же.
- Следующий фронт (оба): лабиринт `0x801B6xx` (логгер, r7=0/r4=0,
pop пустого стека). Кандидаты: S8-стаблет, таблица логгера.
## b21-b23: логгер, S9, S10, rollback (2026-09-12)
- Логгер `0x8034810` = голый `pop.w 0x28` без push (жрал стек) → S8:
вход → `bx lr` (b21). Возврат игнорируется (callers ставят r0=0).
- Лабиринт `0x801B6A0`: счётчик `[r4]++` + `pop.w` на пустых фреймах
(r4/r7=STUBV из fill) → S9 (b22): `[sp+0x14]` ненулевой → исходный
pop; ноль → restore r0/r4/r5/sl/fp + **reset sp=0x085FFF00** +
прыжок в sbl_main `0x802f69d` через ip (без литералов).
- Rollback `boot_rollback_version.c:580` (query всегда `0x302E`) → NOP NOP
(b22, возврат игнорируется). Query зовёт `*table[0x080528D0]` (нули) →
фабрикация: poke STUBV (maze вернёт 0 = версии OK) (b23).
- Rollback выходил боком в helper-mid (`pop{r4,pc}` без push) → S10 (b23):
`movw/movt ip + bx ip` в sbl_main `0x802f6a3`.
- b23: 2M инстр. без падений (sp здоров), sbl_main идёт дальше
(`0x80164C4`-subtree → прыжок в OCIMEM-нули `0x222F84` — фронт PBL-данных).
QEMU-паритет: R15=0x223000, sp=0x85FFF00, lr=0x80164CB — там же.
## b24: world-switch stub, clock S11 (2026-09-12)
- Диспетчер (`0x80164C4`-subtree) зовёт ARM jump-table `0x8007158`
(`ldr pc`), та — в OCIMEM-трамплин world-switch `0x221EF8`
(ARM: save regs, `cps MON`, `mrc`, `ldr sp/pc` из PBL-таблиц
`[0x221F6C]=0x223620`/`[0x221F70]=0x223930` → вызов TZ; TZ не загружен).
Вход получается в Thumb → b24-стаб (4B `movs r0,#0; bx lr`):
возврат 0 в диспетчер (TZ deferred). Перезаписывает голову ARM'а
(восстановимо из ELF).
- Дальше: clock-fn `0x800E960` (udiv-подсчёты) с голым выходом
`pop{r4,pc}` (без push, tail-chain через NOP-идиому) → S11 (b24):
вход → `bx lr` (lr = брошенный-но-валидный `0x80076CD`).
- Poll `[0x73A100]` (lsls#29+bpl = проверка bit2!): SBL только читает →
фабрикация bit2=1 (b24 scaffold, обе стороны).
- `blx #0x8006964` в файловые нули паддинга (PBL scratch) → S12v2 (b25
scaffold, ARM! т.к. blx-imm на чётный): preset ip=S16 + ACK bit1
`[0x73A100]` (side effect для poll#2) + `bx lr`. Литерал `[0x8006980]`.
- Helper-pop `0x8007B66` читает scratch (счётчики 0-4 вместо pushed lr,
фреймы съедены null-циклами) → S16v2 (b25 smart): B66 (`pop``bx ip`,
2B) → S16 проверяет ip (odd + top 8 = legit pushed-lr → `bx ip`;
иначе default: restore r7, прыжок `0x8007779`). S12v3 грузит ip из
`[sp+4]` (pushed lr) + ACK bit1. B66-патч в ELF (b25), S12/S16 в scaffold.
## b26: S17 safe-logger (2026-09-13)
- S8 (`bx lr`) гасил весь init-лог (UART пуст by design) вслепую.
S17 (50B @0x08006CF0): печать r1-строки в UARTDM-TF, только если r1
в rodata `[0x804B800,0x8058000)` (wild-указатели скипаются), затем
pop-return (без leak'а, возврат игнорируется). Логгер `0x8034810`
(`pop.w` 4B) → `b.w S17`. Видимость прогресса вместо счёта инстр.
## b27: poll re-init skip (2026-09-13)
- Poll-fn `0x8007748`: `cbz r6` (r6=2 константа caller'а, никогда 0) →
вечный re-init (`movs r4,#0`, table loop) вместо poll#2-direct.
Патч 2B→2B в `b`. Биты 0,1,2 `[0x73A100]` pref-set (scaffold).
- S16v3: `add sp,#8` перед `bx ip` (снимает helper-фрейм, пропущенный
B66 — un-leak стека вниз).
- S16v4: отбраковка `ip==STUBV` (fill/maze — никогда legit return) →
default вместо возврата в maze (разрыв maze-B66 петли).
- S12v4 (scaffold, без ELF): smart dispatcher в самом S12 (проверка
pushed-lr + ACK + возврат) — S16 больше не нужен в цепочке (остаётся
как fallback).
- S12v5: +restore r7 (peripheral base, S16 dormant) прямо в S12.
## b28: poll-epilogue march kill (2026-09-13)
- Poll-fn входит mid-way (без prologue-push), выходит через
`add sp,#0x1C + pop.w 0x14` (+0x30/проход, пушей нет) → марш вверх
через fill в IMEM-нули → fault на верху. `add sp` → NOP (2B, b28).
Pop читает helper-фреймы (pushed-lr, валидные возвраты).
## b29: S18 poll-epilogue router (2026-09-13)
- b28-NOP убрал только +0x1C; `pop.w 0x14` без пушей всё равно марширует.
S18 (10B @0x08006D22): слепой прыжок в sbl_main `0x802F6A9`
(post-dispatcher). Эпилог `pop.w` (4B) → `b.w S18`.
## b30: epilogue blx (2026-09-13)
- sbl_main дошёл до `0x8016320` (logger-ish, грузит магию "SBL1"),
тот зовёт shared-эпилог `0x8007280` (Thumb!) через `blx`-imm
(чётный → ARM → fault на coprocessor-мусоре). Патч в глобальной
BLX2BL (`blx``bl`, как остальные). r7="SBL1", r0=SMEM — читает
настоящие таблицы!
## b31: logger-epilogue NOP (2026-09-13)
- `0x8016320` зовёт эпилог `0x8007280`, чей pop читает fill/STUBV →
maze → stale-lr в logger-mid → снова blx эпилог (голая взаимная
рекурсия). Вызов скипается (NOP NOP); sbl_main идёт дальше
`0x802F6B0` в свежий код.
## b32: logger-tail b.w (2026-09-13)
- 9-й вызывающий shared-эпилога (`0x8016342 blx`, пропущен статикой):
точный `b.w` (флип съезжает +2). r7="SBL1" магика из настоящих таблиц.
## b33: partition wrap-check (2026-09-13)
- Валидатор партиций (`adds; blo success`, line 0x1FD) ассёртит:
r0+r4 не враппаются (PBL-таблицы нулевые, r4 stale). `blo``b`
(2B). TODO(MainOS): настоящие PBL/SMEM partition tables.
## b34: hang neutralize (2026-09-13)
- Assert-hang `0x8018458` (`b .`) достигается напрямую через
maze-stale-lr (мимо патченного wrap-check). `b .``b success`
(2B, в success-путь).
## b35: sbl_mc hangs (2026-09-13)
- Мёртвая assert-fn `sbl_mc.c:320` (`0x802F9A0-b.`, `0x802F9B2-b.`)
достигается accident'ом (pop-garbage). Оба hang'а → S19
(рестарт post-logger init, bounded table work). 4B `b.w` каждый.
- Урок: полный IMEM-poison ломает IMEM-стек (счётчики читают
0xFFFFFFFF вместо свежих нулей → underflow → wild-pop). Только
tripwire 4B на входе дрейфа `[0x8600000,0x8600004)`.
## b36: assert-entry to S19 (2026-09-13)
- sbl_mc assert-fn входит mid-way (`0x802F9A2`), минуя S19-hang'и.
Вход тоже в S19 (ест ldr + половину movw).
## b37: S20 clock-dispatcher router (2026-09-13)
- Голый clock-диспетчер (`0x800EB80`, без пушей) снимает `pop.w 0x30`
за проход → марш sp к верху IMEM. S20 (34B @0x08006D38):
`[sp+0x2C]` валиден → исходный pop; иначе r0=sl + re-run
(идемпотентная математика). Эпилог `pop.w` (4B) → `b.w S20`.
## b38: S21 table-walker router (2026-09-13)
- Голый table-walker (`0x8007916`, mid-входы без пушей) снимает
`pop.w 0x28`, читает saved-FP (`0x85FFEB0`) как pc → ARM fill-дрейф
(STM-clobbers!). S21 (32B @0x08006D5A): `[sp+0x24]` валиден →
исходный pop; иначе `b.w S19`. Эпилог `pop.w` (4B) → `b.w S21`.
## b37: S20 clock-dispatcher router (2026-09-13)
- Голый clock-диспетчер (`0x800EB80`, без пушей) снимает `pop.w 0x30`
за проход → марш sp к верху IMEM. S20 (34B @0x08006D38):
`[sp+0x2C]` валиден → исходный pop; иначе r0=sl + re-run
(идемпотентная математика). Эпилог `pop.w` (4B) → `b.w S20`.
## maze v2 (2026-09-13)
- Maze с чётным lr уходил в ARM-дрейф (STM-clobbers + IMEM fault).
Maze v2 (24B): возврат только при odd Thumb lr из DDR, иначе hang
громко. Залез на голову S6 (`[B9E,BA4)`, S6 dormant). Vec-maze тоже v2.
+1 -1
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@@ -5,7 +5,7 @@
set -e
cd "$(dirname "$0")/.."
QEMU=~/qemu-src/qemu-8.2.2/build/qemu-system-arm
B=${1:-b17}
B=${1:-b38}
IMG=fw/img/emmc-real.img
if [ ! -f "$IMG" ]; then
echo "no $IMG — сначала: python3 tools/ffu_extract.py fw/dl/RM1127_059X5R5_orig.ffu --emmc-user fw/img/user-real.bin"
+255 -28
View File
@@ -104,15 +104,15 @@ static void saimaa_tmr_init(Object *obj)
/* Stubs region handle for set_readonly after scaffold implant. */
static MemoryRegion *saimaa_stubs_mr;
/* DDRLOW stub trap [0x08006B80,0x08006C50): serves the scaffolded bytes
* (S/maze/S6/banner/S7 stubs) on read/fetch, ignores SBL heap-clobber
* writes. Uni parity: deferred-restore guard in sbl_uni.py (wider:
* [0x080068C0,0x08006C50), also covers PBL stub).
/* DDRLOW stub trap [0x08006B80,0x08006D80): serves the scaffolded bytes
* (S/maze/S6/banner/S7/S9/S10/S16/S17/S18/S20/S21 stubs) on read/fetch,
* ignores SBL heap-clobber writes. Uni parity: deferred-restore guard
* in sbl_uni.py (wider: [0x080068C0,0x08006D80), also covers PBL stub).
* Snapshot is taken AFTER ELF load + all stub writes (readback).
* PBL stub [0x080068C0,0x080068F4) and the ELF-text gap below stay plain
* RAM: PBL runs once (if at all), gap holds real hot SBL code. */
#define SAIMAA_DSTUB_BASE 0x08006B80
#define SAIMAA_DSTUB_SIZE 0x000000D0
#define SAIMAA_DSTUB_SIZE 0x00000200
static uint8_t saimaa_dstub_mem[SAIMAA_DSTUB_SIZE];
static uint64_t saimaa_dstub_read(void *opaque, hwaddr off, unsigned size)
@@ -167,13 +167,46 @@ struct SaimaaUartState {
static int saimaa_vec_n;
static uint64_t saimaa_vec_read(void *opaque, hwaddr off, unsigned size)
{
if (saimaa_vec_n < 400) {
/* Maze blob v2 mirrored at [0,24) for THUMB fetches: null-jump
* fetches (bx r0=0, pop 0, ldr pc,=0) execute the maze and return
* via lr — uni parity (hook_null -> STUB). ARM-mode fetches (real
* exception entry) keep BKPT vectors below. Data probes elsewhere
* read 0. */
static const uint8_t maze[24] = {
0x00, 0x20, 0x4f, 0xea, 0x1e, 0x6c, 0xbc, 0xf1,
0x08, 0x0f, 0x03, 0xd1, 0x1e, 0xf0, 0x01, 0x0f,
0x00, 0xd0, 0x70, 0x47, 0x72, 0xb6, 0xfd, 0xe7,
};
{
ARMCPU *cpu = ARM_CPU(current_cpu);
if (cpu && cpu->env.thumb && off < sizeof(maze)) {
uint64_t v = 0;
unsigned i, n = size;
if (off + n > sizeof(maze)) {
n = sizeof(maze) - off;
}
for (i = 0; i < n; i++) {
v |= (uint64_t)maze[off + i] << (8 * i);
}
return v;
}
} if (saimaa_vec_n < 400) {
ARMCPU *cpu = ARM_CPU(current_cpu);
uint64_t pc = cpu ? cpu->env.regs[15] : 0;
int th = cpu ? cpu->env.thumb : 0;
uint32_t dfar = 0, ifsr = 0, dfsr = 0;
if (cpu) {
/* CP15 DFAR/IFSR/DFSR for abort diagnosis */
dfar = cpu->env.cp15.dfar_s;
ifsr = (uint32_t)cpu->env.cp15.ifsr_s;
dfsr = (uint32_t)cpu->env.cp15.dfsr_s;
fprintf(stderr, " SCTLR=0x%lx", (unsigned long)cpu->env.cp15.sctlr_s);
}
fprintf(stderr, "saimaa-vec: %s off=0x%x pc=0x%lx",
size == 2 ? "fetch?" : "read",
(unsigned)off, (unsigned long)pc - (th ? 4 : 8));
fprintf(stderr, " DFAR=0x%x IFSR=0x%x DFSR=0x%x", dfar, ifsr,
dfsr);
if (cpu) {
int b, r;
fprintf(stderr, " regs=");
@@ -523,13 +556,15 @@ static void saimaa_machine_init(MachineState *machine)
cpu_physical_memory_write(S + 4, &STUBV, 4);
cpu_physical_memory_write(S + 8, &STUBV, 4);
{
/* Minimal maze: movs r0,#0; bx lr (4B). No mailbox, no
* guard — vec trap already reports fault state. Less
* surface for SBL heap clobbers. */
/* Maze v2 (24B @STUB): movs r0,#0; return 0 via lr ONLY
* if lr is odd Thumb in DDR (top 8); even lr (stale
* mid-fn raw addr!) would ARM-drift (STM-clobbers +
* IMEM fault), so hang loud instead. Overlaps S6 head
* ([B9E,BA4), S6 dormant, documented below). */
static const uint8_t mb[] = {
0x00, 0x20, 0x4f, 0xea, 0x1e, 0x6c, 0xbc, 0xf1,
0x08, 0x0f, 0x00, 0xd1, 0x70, 0x47, 0x72, 0xb6,
0xfd, 0xe7,
0x08, 0x0f, 0x03, 0xd1, 0x1e, 0xf0, 0x01, 0x0f,
0x00, 0xd0, 0x70, 0x47, 0x72, 0xb6, 0xfd, 0xe7,
};
size_t k;
for (k = 0; k < sizeof(mb); k += 4) {
@@ -542,23 +577,11 @@ static void saimaa_machine_init(MachineState *machine)
cpu_physical_memory_write(0x087c29d18, &S, 4);
cpu_physical_memory_write(0x08050b28, &S, 4);
cpu_physical_memory_write(0x08070000, &S, 4);
/* S6 stublet at 0x08006B9E: rebuild popped frame regs,
* return to 0x8013ba5 (b14 redirects 0x8017afc pop here) */
{
static const uint8_t s6[] = {
0xbd, 0xe8, 0xfc, 0x47, /* ldmia.w sp!,{r2-r9,sl,lr} */
0x43, 0xf6, 0xa5, 0x3e, /* movw lr,#0x3ba5 */
0xc0, 0xf6, 0x01, 0x0e, /* movt lr,#0x801 */
0x70, 0x47, /* bx lr */
};
size_t k;
for (k = 0; k < sizeof(s6); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s6) - k < 4 ? sizeof(s6) - k : 4;
__builtin_memcpy(&word, &s6[k], n);
cpu_physical_memory_write(0x08006B9E + k, &word, 4);
}
}
/* S6 stublet DISABLED (maze v2 overlaps its head [B9E,BA4);
* S6 dormant, never entered (b14 goes to 0x8005B9E).
* Bytes kept for reference (would live at 0x08006B9E):
* ldmia.w sp!,{r2-r9,sl,lr}; movw lr,#0x3ba5;
* movt lr,#0x801; bx lr. */
/* Banner stub at 0x08006BAC: print r0 string via UARTDM
* (b16 redirects 0x802f690 blx here). Built from qemu/banner.S:
* push frame, print loop, ldr pc,=0x802f694 (callee noreturn).
@@ -622,6 +645,204 @@ static void saimaa_machine_init(MachineState *machine)
cpu_physical_memory_write(0x08006C10 + k, &word, 4);
}
}
/* S9 stublet at 0x08006C48 (62B, b22): labyrinth-epilogue
* exit router (0x801B6BE pop.w -> b.w S9). Empty frames ->
* restore r0/r4/r5/sl/fp, reset sp to 0x085FFF00, jump to
* sbl_main 0x802f69d via ip. Assembled with keystone. */
{
static const uint8_t s9[] = {
0x05, 0x9b, 0x0b, 0xb1, 0xbd, 0xe8, 0xf0, 0x81,
0x00, 0x20, 0x40, 0xf2, 0x00, 0x04, 0xc0, 0xf2,
0x22, 0x04, 0x40, 0xf2, 0x00, 0x05, 0xc0, 0xf2,
0x22, 0x05, 0x40, 0xf2, 0x00, 0x0a, 0xc0, 0xf6,
0x06, 0x0a, 0x41, 0xf2, 0x00, 0x0b, 0xc0, 0xf6,
0x06, 0x0b, 0x4f, 0xf6, 0x00, 0x73, 0xc0, 0xf6,
0x5f, 0x03, 0x9d, 0x46, 0x4f, 0xf2, 0x9d, 0x6c,
0xc0, 0xf6, 0x02, 0x0c, 0x60, 0x47,
};
size_t k;
for (k = 0; k < sizeof(s9); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s9) - k < 4 ? sizeof(s9) - k : 4;
__builtin_memcpy(&word, &s9[k], n);
cpu_physical_memory_write(0x08006C48 + k, &word, 4);
}
}
/* S10 stublet at 0x08006C88 (10B, b23): rollback-exit router.
* movw/movt ip + bx ip to sbl_main 0x802f6a3. */
{
static const uint8_t s10[] = {
0x4f, 0xf2, 0xa3, 0x6c, 0xc0, 0xf6, 0x02, 0x0c,
0x60, 0x47,
};
size_t k;
for (k = 0; k < sizeof(s10); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s10) - k < 4 ? sizeof(s10) - k : 4;
__builtin_memcpy(&word, &s10[k], n);
cpu_physical_memory_write(0x08006C88 + k, &word, 4);
}
}
/* S18 stublet at 0x08006D22 (10B, b29): poll-epilogue router.
* movw/movt ip + bx ip to sbl_main 0x802f6a9. */
{
static const uint8_t s18[] = {
0x4f, 0xf2, 0xa9, 0x6c, 0xc0, 0xf6, 0x02, 0x0c,
0x60, 0x47,
};
size_t k;
for (k = 0; k < sizeof(s18); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s18) - k < 4 ? sizeof(s18) - k : 4;
__builtin_memcpy(&word, &s18[k], n);
cpu_physical_memory_write(0x08006D22 + k, &word, 4);
}
}
/* S21 stublet at 0x08006D5A (32B, b38): table-walker router.
* [sp+0x24] valid-code? => original pop.w (legit return);
* else b.w S19 (sbl_main post-logger restart). */
{
static const uint8_t s21[] = {
0x09, 0x9b, 0x13, 0xf0, 0x01, 0x0f, 0x09, 0xd0,
0x1a, 0x0e, 0x08, 0x2a, 0x01, 0xd1, 0xbd, 0xe8,
0xf0, 0x9f, 0x1a, 0x0f, 0x08, 0x2a, 0x01, 0xd1,
0xbd, 0xe8, 0xf0, 0x9f, 0xff, 0xf7, 0xd9, 0xbf,
};
size_t k;
for (k = 0; k < sizeof(s21); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s21) - k < 4 ? sizeof(s21) - k : 4;
__builtin_memcpy(&word, &s21[k], n);
cpu_physical_memory_write(0x08006D5A + k, &word, 4);
}
}
/* S20 stublet at 0x08006D38 (34B, b37): clock-dispatcher
* router. [sp+0x2C] valid-code? => original pop.w (legit);
* else r0=sl + b.w dispatcher re-run (idempotent math). */
{
static const uint8_t s20[] = {
0x0b, 0x9b, 0x13, 0xf0, 0x01, 0x0f, 0x09, 0xd0,
0x1a, 0x0e, 0x08, 0x2a, 0x01, 0xd1, 0xbd, 0xe8,
0xfe, 0x8f, 0x1a, 0x0f, 0x08, 0x2a, 0x01, 0xd1,
0xbd, 0xe8, 0xfe, 0x8f, 0x50, 0x46, 0x07, 0xf0,
0x13, 0xbf,
};
size_t k;
for (k = 0; k < sizeof(s20); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s20) - k < 4 ? sizeof(s20) - k : 4;
__builtin_memcpy(&word, &s20[k], n);
cpu_physical_memory_write(0x08006D38 + k, &word, 4);
}
}
/* S17 safe-logger (50B @0x08006CF0, b26): print r1-string
* via UARTDM-TF iff r1 in rodata [0x804B800,0x8058000);
* pop-return (no leak). Replaces S8 silence with logs. */
{
static const uint8_t s17[] = {
0x4b, 0xf6, 0x00, 0x03, 0xc0, 0xf6, 0x04, 0x03,
0x99, 0x42, 0x11, 0xd3, 0x48, 0xf2, 0x00, 0x03,
0xc0, 0xf6, 0x05, 0x03, 0x99, 0x42, 0x0b, 0xd2,
0x10, 0xb5, 0x4f, 0xf2, 0x00, 0x03, 0xc0, 0xf2,
0x8a, 0x73, 0x0c, 0x46, 0x14, 0xf8, 0x01, 0x0b,
0x08, 0xb1, 0x18, 0x67, 0xfa, 0xe7, 0x10, 0xbd,
0x70, 0x47,
};
size_t k;
for (k = 0; k < sizeof(s17); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s17) - k < 4 ? sizeof(s17) - k : 4;
__builtin_memcpy(&word, &s17[k], n);
cpu_physical_memory_write(0x08006CF0 + k, &word, 4);
}
}
/* PBL version-table fabrication (b23): [0x080528D0] = STUBV
* so the rollback query's blx calls maze (0 = versions OK). */
{
uint32_t v = 0x08006B8D;
cpu_physical_memory_write(0x080528D0, &v, 4);
}
/* PBL dispatcher-table fabrication (b33, moved b37): retarget
* literal [0x80164F0] (image: hash blob!) to scratch struct
* at 0x08024000 (OCIMEM, out of stack-march paths!) with
* [0x18]=2 (ready -> dispatch). Was IMEM 0x08600200
* (self-executed when sp marched there!). */
{
uint32_t v = 0x08024000;
cpu_physical_memory_write(0x08024000, &v, 4);
v = 0x00000002;
cpu_physical_memory_write(0x08024014, &v, 4);
v = 0x08024000;
cpu_physical_memory_write(0x080164F0, &v, 4);
}
/* HW-ready bits (b25/b26): [0x073A100] bits 0,1,2 (SBL
* read-only polls: bit2 poll#1, bit1 poll#2, bit0 gate). */
{
uint32_t v = 0x00000007;
cpu_physical_memory_write(0x073A100, &v, 4);
}
/* PBL world-switch Thumb-stub (b24, 4B @0x00221EF8):
* movs r0,#0; bx lr (return 0 to dispatcher, TZ deferred).
* Overwrites ARM trampoline head (recoverable from ELF). */
{
uint32_t v = 0x47702000;
cpu_physical_memory_write(0x00221EF8, &v, 4);
}
/* S12-stub (b27, 100B @0x08006964, ARM): blx-to-padding
* becomes smart dispatcher: ldr ip,[sp,#4] (=pushed lr);
* ip==STUBV/even/non-code => ip=poll resumption 0x8007779;
* else keep pushed-lr (NO add-sp!); restore r7;
* ACK peripheral bit1 ([literal 0x073A100]); bx lr.
* PBL would place the real ARM helper here. */
{
static const uint8_t s12[] = {
0x04, 0xc0, 0x9d, 0xe5, 0x8d, 0x3b, 0x06, 0xe3,
0x00, 0x38, 0x40, 0xe3, 0x03, 0x00, 0x5c, 0xe1,
0x09, 0x00, 0x00, 0x0a, 0x01, 0x00, 0x1c, 0xe3,
0x07, 0x00, 0x00, 0x0a, 0x2c, 0x3c, 0xa0, 0xe1,
0x08, 0x00, 0x53, 0xe3, 0x00, 0x00, 0x00, 0x1a,
0x05, 0x00, 0x00, 0xea, 0x2c, 0x3e, 0xa0, 0xe1,
0x08, 0x00, 0x53, 0xe3, 0x00, 0x00, 0x00, 0x1a,
0x01, 0x00, 0x00, 0xea, 0x79, 0xc7, 0x07, 0xe3,
0x00, 0xc8, 0x40, 0xe3, 0x00, 0x70, 0x0a, 0xe3,
0x73, 0x70, 0x40, 0xe3, 0x0c, 0x30, 0x9f, 0xe5,
0x00, 0x20, 0x93, 0xe5, 0x02, 0x20, 0x82, 0xe3,
0x00, 0x20, 0x83, 0xe5, 0x1e, 0xff, 0x2f, 0xe1,
0x00, 0xa1, 0x73, 0x00,
};
size_t k;
for (k = 0; k < sizeof(s12); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s12) - k < 4 ? sizeof(s12) - k : 4;
__builtin_memcpy(&word, &s12[k], n);
cpu_physical_memory_write(0x08006964 + k, &word, 4);
}
}
/* S16-stublet (b27, 64B @0x08006CC0): smart return for the
* B66 bx-ip chain. ip==STUBV (fill/maze, never legit) =>
* default; ip odd + top 8 => add sp,#8 (pop the helper
* frame B66 skipped!) + bx ip (legit pushed-lr, un-leaks);
* else default (restore r7, jump poll resumption 0x8007779
* via ip). */
{
static const uint8_t s16[] = {
0xdd, 0xf8, 0x04, 0xc0, 0x46, 0xf6, 0x8d, 0x33,
0xc0, 0xf6, 0x00, 0x03, 0x9c, 0x45, 0x0e, 0xd0,
0x1c, 0xf0, 0x01, 0x0f, 0x0b, 0xd0, 0x5f, 0xea,
0x1c, 0x63, 0x08, 0x2b, 0x01, 0xd1, 0x02, 0xb0,
0x60, 0x47, 0x5f, 0xea, 0x1c, 0x73, 0x08, 0x2b,
0x01, 0xd1, 0x02, 0xb0, 0x60, 0x47, 0x4a, 0xf2,
0x00, 0x07, 0xc0, 0xf2, 0x73, 0x07, 0x47, 0xf2,
0x79, 0x7c, 0xc0, 0xf6, 0x00, 0x0c, 0x60, 0x47,
};
size_t k;
for (k = 0; k < sizeof(s16); k += 4) {
uint32_t word = 0;
size_t n = sizeof(s16) - k < 4 ? sizeof(s16) - k : 4;
__builtin_memcpy(&word, &s16[k], n);
cpu_physical_memory_write(0x08006CC0 + k, &word, 4);
}
}
{
uint32_t fill = 0x08006B8D;
uint32_t a;
@@ -629,6 +850,12 @@ static void saimaa_machine_init(MachineState *machine)
cpu_physical_memory_write(a, &fill, 4);
}
}
/* IMEM tripwire [0x8600000,0x8600004): drift-sink trap.
* Must stay 4B (wider poison corrupts IMEM-stack reads). */
{
uint32_t p = 0xFFFFFFFF;
cpu_physical_memory_write(0x08600000, &p, 4);
}
/* pop-site slots -> stublets (sp values from cpu traces) */
v = 0x802f65d; /* S1 pop10 @fef0: resume sbl_main */
cpu_physical_memory_write(0x085FFF14, &v, 4);
+1772 -2
View File
File diff suppressed because it is too large Load Diff
+215 -14
View File
@@ -101,9 +101,28 @@ def main():
last = [0]
from collections import deque
hist = deque(maxlen=20000)
# sled detector: sequential runs (pc == prev+2/4) longer than THRESH
# are zero-drifts; log run start (the jump/fall that entered it).
_sled_start = [0]
_sled_n = [0]
_sled_log = []
_SLED_TH = 100
calls = [] if "--calltrace" in sys.argv else None
rets = [] if "--retrace" in sys.argv else None
qlog = [] if "--querylog" in sys.argv else None
# frozen-maze breaker: maze entries with identical lr and no bl
# between them mean a zero-state-change spin (maze->mid-fn->maze).
# After K, redirect once to poll resumption (fresh bls unfreeze lr).
_fmlr = [None]
_fmct = [0]
_FMK = 50
_FMPC = 0x8007779
_traps = []
_trap_n = [0]
if "--trap" in sys.argv:
_traps = [int(x, 0) for x in sys.argv[sys.argv.index("--trap") + 1].split(",")]
if "--trapn" in sys.argv:
_trap_n = [int(sys.argv[sys.argv.index("--trapn") + 1])]
_spmax = [0x085FFF00]
_splog = [] if "--spytrack" in sys.argv else None
elog = [] if "--entrylog" in sys.argv else None
@@ -121,6 +140,35 @@ def main():
def hook_code(mu, addr, size, data):
count[0] += 1
last[0] = addr
_pp = _prev[0]
_prev[0] = addr
if addr == _pp + 2 or addr == _pp + 4:
if _sled_n[0] == 0:
_sled_start[0] = _pp
_sled_n[0] += 1
else:
if _sled_n[0] >= _SLED_TH and len(_sled_log) < 20:
_sled_log.append((count[0], _sled_start[0], _pp, _sled_n[0]))
_sled_n[0] = 0
if 0x08006B8C <= addr < 0x08006B9E:
try:
_lr = mu.reg_read(_LR)
except Exception:
_lr = None
if _lr == _fmlr[0]:
_fmct[0] += 1
if _fmct[0] >= _FMK:
_fmct[0] = 0
_fmlr[0] = None
mu.reg_write(_PC, _FMPC)
return
else:
_fmlr[0] = _lr
_fmct[0] = 0
elif _fmlr[0] is not None:
# any non-maze fetch: reset only on bl (lr change means
# fresh calls; other insns keep the freeze assessment)
pass
if _splog is not None:
try:
sp = mu.reg_read(UC_ARM_REG_SP)
@@ -145,6 +193,38 @@ def main():
except Exception:
thumb = 1
hist.append((addr, thumb))
if _traps and addr in _traps:
try:
vals = [mu.reg_read(_REGS[i]) for i in range(8)]
except Exception:
vals = []
print(f"TRAP {addr:#x} insn#{count[0]} r0-r7={[hex(x) for x in vals]} sp={mu.reg_read(UC_ARM_REG_SP):#x} lr={mu.reg_read(_LR):#x}")
try:
print(f" [73A100]={bytes(mu.mem_read(0x073A100, 4)).hex()}")
except Exception as e:
print(f" [73A100] unreadable: {e}")
try:
from capstone import Cs, CS_ARCH_ARM, CS_MODE_THUMB, CS_MODE_ARM
md_t = Cs(CS_ARCH_ARM, CS_MODE_THUMB)
md_a = Cs(CS_ARCH_ARM, CS_MODE_ARM)
for _pc, _th in list(hist)[-60:]:
try:
_b = _pc & ~1
_c = mu.mem_read(_b, 8 if _th else 12)
for _ins in (md_t if _th else md_a).disasm(_c, _b):
print(f" hist {_b:#x}{'t' if _th else 'a'}: {_ins.mnemonic} {_ins.op_str}")
break
except Exception:
print(f" hist {_pc:#x}: <unreadable>")
except ImportError:
pass
_trap_n[0] -= 1
if _trap_n[0] <= 0 and "--trapn" in sys.argv:
mu.emu_stop()
return
if "--trapn" not in sys.argv:
mu.emu_stop()
return
if qlog is not None and addr in (0x8017EA4, 0x8017C60):
try:
vals = [mu.reg_read(_REGS[i]) for i in range(8)]
@@ -158,9 +238,15 @@ def main():
inside = _elo <= addr < _ehi
if inside and not _inrng[_i]:
if len(elog) < 20000:
elog.append((count[0], _prev[0], addr))
try:
_th = (mu.reg_read(_CPSR) >> 5) & 1
except Exception:
_th = -1
elog.append((count[0], _prev[0], addr, _th))
if not inside and _inrng[_i]:
if len(elog) < 20000:
elog.append((count[0], _prev[0], -addr, 2))
_inrng[_i] = inside
_prev[0] = addr
if calls is not None and size in (2, 4):
try:
if size == 2:
@@ -182,6 +268,15 @@ def main():
bxt = -1
if len(calls) < 8000:
calls.append((addr, 100 + bxrm, bxt))
# pop {..,pc} (0xBD00+): log stacked target
if calls is not None and (h & 0xFF00) == 0xBD00:
try:
_sp = mu.reg_read(UC_ARM_REG_SP)
_tgt = struct.unpack("<I", mu.mem_read(_sp, 4))[0]
except Exception:
_tgt = -1
if len(calls) < 12000:
calls.append((addr, 300, _tgt))
if rets is not None and 0x8017E00 <= addr < 0x8018000:
# pop {..,pc} (0xBD00+) or bx lr (0x4770)
if h == 0x4770 or (h & 0xFF00) == 0xBD00:
@@ -236,6 +331,7 @@ def main():
# immune to [0]-writes that clobber a static maze copy
from unicorn.arm_const import UC_ARM_REG_PC as _PC
_nulllog = []
_halt_on_null = "--haltonnull" in sys.argv
def hook_null(mu, addr, size, data):
if len(_nulllog) < 10:
@@ -247,6 +343,8 @@ def main():
r, lr, sp = [], -1, -1
# walk back: find the branch source from hist
_nulllog.append((count[0], r, lr, sp))
if _halt_on_null and len(_nulllog) == 1:
return False
mu.reg_write(_PC, STUB + 1)
mu.hook_add(UC_HOOK_CODE, hook_null, begin=0x0, end=0xFFF)
@@ -278,18 +376,23 @@ def main():
W32(S, S + 8)
W32(S + 4, STUBV)
W32(S + 8, STUBV)
# maze blob (18B)
# maze blob (24B @STUB): movs r0,#0; return 0 via lr ONLY if lr is
# odd Thumb in DDR (top 8); even lr (stale mid-fn raw addr!) would
# ARM-drift (STM-clobbers + IMEM fault), so hang loud instead.
# Overlaps S6 head ([B9E,BA4), S6 dormant, documented).
mu.mem_write(STUB, bytes([
0x00, 0x20, 0x4f, 0xea, 0x1e, 0x6c, 0xbc, 0xf1,
0x08, 0x0f, 0x00, 0xd1, 0x70, 0x47, 0x72, 0xb6,
0xfd, 0xe7]))
print("maze-rb:", bytes(mu.mem_read(STUB, 18)).hex())
0x08, 0x0f, 0x03, 0xd1, 0x1e, 0xf0, 0x01, 0x0f,
0x00, 0xd0, 0x70, 0x47, 0x72, 0xb6, 0xfd, 0xe7]))
print("maze-rb:", bytes(mu.mem_read(STUB, 24)).hex())
for a in (0x087c29d18, 0x08050b28, 0x08070000):
W32(a, S)
# S6 stublet (14B @0x08006B9E)
mu.mem_write(0x08006B9E, bytes([
0xbd, 0xe8, 0xfc, 0x47, 0x43, 0xf6, 0xa5, 0x3e,
0xc0, 0xf6, 0x01, 0x0e, 0x70, 0x47]))
# S6 stublet DISABLED (maze v2 overlaps its head; S6 dormant,
# never entered (b14 goes to 0x8005B9E, not here). Bytes kept for
# reference (would live at 0x08006B9E):
# mu.mem_write(0x08006B9E, bytes([
# 0xbd, 0xe8, 0xfc, 0x47, 0x43, 0xf6, 0xa5, 0x3e,
# 0xc0, 0xf6, 0x01, 0x0e, 0x70, 0x47]))
# banner stub (34B @0x08006BAC, prints r0 via UARTDM)
mu.mem_write(0x08006BAC, bytes([
0x10, 0xb5, 0x4f, 0xf2, 0x00, 0x03, 0xc0, 0xf2,
@@ -313,8 +416,86 @@ def main():
"ff2c13d940f20004c0f2220440f20005c0f2220540f2000a"
"c0f6060a41f2000bc0f6060bdff800f081f60208dff800f0"
"a53b0108"))
# S9 stublet (62B @0x08006C48, b22): labyrinth-epilogue exit router.
# ldr r3,[sp,#0x14]: nonzero -> original pop.w (legit return);
# zero (empty scaffold frames) -> restore r0/r4/r5/sl/fp, reset sp
# to 0x085FFF00 (fresh STUBV-fill stack), jump to sbl_main 0x802f69d
# via ip (no literal loads).
mu.mem_write(0x08006C48, bytes.fromhex(
"059b0bb1bde8f081002040f20004c0f2220440f20005c0f2"
"220540f2000ac0f6060a41f2000bc0f6060b4ff60073c0f6"
"5f039d464ff29d6cc0f6020c6047"))
# S10 stublet (10B @0x08006C88, b23): rollback-exit router.
# movw/movt ip + bx ip to sbl_main 0x802f6a3.
mu.mem_write(0x08006C88, bytes.fromhex("4ff2a36cc0f6020c6047"))
# S18 stublet (10B @0x08006D22, b29): poll-epilogue router.
# movw/movt ip + bx ip to sbl_main 0x802f6a9 (post-dispatcher).
mu.mem_write(0x08006D22, bytes.fromhex("4ff2a96cc0f6020c6047"))
# S21 stublet (32B @0x08006D5A, b38): table-walker router.
# [sp+0x24] valid-code? => original pop.w (legit return);
# else b.w S19 (sbl_main post-logger restart, bounded table work).
mu.mem_write(0x08006D5A, bytes.fromhex(
"099b13f0010f09d01a0e082a01d1bde8f09f1a0f082a"
"01d1bde8f09ffff7d9bf"))
# S20 stublet (34B @0x08006D38, b37): clock-dispatcher router.
# [sp+0x2C] valid-code? => original pop.w (legit return);
# else r0=sl (PBL tables) + b.w dispatcher re-run (idempotent math).
mu.mem_write(0x08006D38, bytes.fromhex(
"0b9b13f0010f09d01a0e082a01d1bde8fe8f1a0f082a"
"01d1bde8fe8f504607f013bf"))
# S17 safe-logger (50B @0x08006CF0, b26): print r1-string via
# UARTDM-TF only if r1 in rodata [0x804B800,0x8058000); pop-return.
mu.mem_write(0x08006CF0, bytes.fromhex(
"4bf60003c0f60403994211d348f20003c0f605039942"
"0bd210b54ff20003c0f28a730c4614f8010b08b11867fae710bd7047"))
# PBL version-table fabrication (b23): [0x080528D0] = STUBV so the
# rollback query's blx calls maze (returns 0 = versions OK).
W32(0x080528D0, STUBV)
# PBL dispatcher-table fabrication (b33): [0x80164F0] (literal pool,
# image default points at hash blob!) retargeted to scratch struct
# at 0x08024000 (OCIMEM, out of stack-march paths!) with [0x18]=2
# (ready-flag -> world-switch dispatch; TZ deferred via OCIMEM stub).
W32(0x08024000, 0x08024000)
W32(0x08024014, 0x00000002)
W32(0x080164F0, 0x08024000)
# HW-ready bit fabrication (b25): [0x073A100] bits 0,1,2 = peripheral
# status done-bits (poll#1 checks bit2 (lsls#29), poll#2 bit1 (lsls#30),
# post-poll gate bit0 (lsls#31)). SBL only reads it, never writes.
W32(0x073A100, 0x00000007)
# PBL world-switch Thumb-stub (b24): the ARM trampoline at 0x221EF8
# is entered in Thumb (mode confusion at dispatch); real ARM would
# save regs/CPS to MON and call TZ (not loaded yet). Stub returns 0
# to the dispatcher via stale lr (TZ bringup deferred).
# NOTE: overwrites 4B of real ARM trampoline (recoverable from ELF).
mu.mem_write(0x00221EF8, bytes([0x00, 0x20, 0x70, 0x47]))
# S12-stub (b27, 100B @0x08006964, ARM): blx-to-padding becomes
# smart dispatcher: ldr ip,[sp,#4] (=pushed lr); ip==STUBV/even/
# non-code => ip=poll resumption 0x8007779; else keep pushed-lr
# (NO add-sp: marches on mid-entries! un-leak dropped, helper-leak
# down is harmless); restore r7; ACK peripheral bit1; bx lr.
# PBL would place the real ARM helper here.
mu.mem_write(0x08006964, bytes.fromhex(
"04c09de58d3b06e3003840e303005ce10900000a0100"
"1ce30700000a2c3ca0e1080053e30000001a050000ea"
"2c3ea0e1080053e30000001a010000ea79c707e300c8"
"40e300700ae3737040e30c309fe5002093e5022082e3"
"002083e51eff2fe100a17300"))
# S16-stublet (b27, 64B @0x08006CC0): smart return for B66 bx ip.
# ip==STUBV (fill/maze, never a legit return) => default;
# ip odd + top 8 (code) => add sp,#8 (pop the helper frame B66
# skipped!) + bx ip (legit pushed-lr return, un-leaks the stack);
# else default (restore r7, jump poll resumption 0x8007779).
mu.mem_write(0x08006CC0, bytes.fromhex(
"ddf804c046f68d33c0f600039c450ed01cf0010f0bd0"
"5fea1c63082b01d102b060475fea1c73082b01d102b0"
"60474af20007c0f2730747f2797cc0f6000c6047"))
# stack zone fill (STUBV odd)
mu.mem_write(0x085F0000, struct.pack("<I", STUBV) * (0x10000 // 4))
# IMEM tripwire [0x8600000,0x8600004): drift-sink trap (UDF).
# Fill-drift falls through here sequentially; faults LOUDLY at
# entry. Must stay 4B: wider poison corrupts IMEM-stack reads
# (SBL frames live at 0x860000C+, counters underflow on 0xFF!).
mu.mem_write(0x08600000, b"\xff\xff\xff\xff")
# pop-site slots (sp values from traces)
for a, v in [(0x085FFF14, 0x802f65d), (0x085FFF1C, 0x802f665),
(0x085FFF44, 0x8013ba5), (0x085FFF5C, 0x802f681),
@@ -349,7 +530,7 @@ def main():
# --- end parity ---
# stub range is readonly on HW/QEMU: ignore SBL heap-clobber writes,
# keep maze/stublets intact (restore-on-write with reentrancy guard)
STUB_LO, STUB_HI = 0x080068C0, 0x08006C50 # +S7 + banner tail
STUB_LO, STUB_HI = 0x080068C0, 0x08006D80 # +S7/S9/S10/S16/S17/S18/S20/S21
stub_snap = bytes(mu.mem_read(STUB_LO, STUB_HI - STUB_LO))
_inww = [False]
_swn = [0]
@@ -417,7 +598,7 @@ def main():
wlolog.append((pc, addr, size, value))
mu.hook_add(UC_HOOK_MEM_WRITE, hook_wlo,
begin=0x08000000, end=0x085FFFFF)
begin=0x00200000, end=0x085FFFFF)
import atexit as _ax2
def _dwlo():
@@ -459,10 +640,24 @@ def main():
print(f" {pc:#x}: <unreadable>")
except ImportError:
print("hist:", [hex(pc) for pc, _ in list(hist)[-12:]])
if _sled_log or _sled_n[0] >= _SLED_TH:
if _sled_n[0] >= _SLED_TH:
_sled_log.append((count[0], _sled_start[0], last[0], _sled_n[0]))
print(f"sleds: {len(_sled_log)}")
for n, s, e, c in _sled_log:
print(f" insn#{n} [{s:#x}..{e:#x}] len={c}")
if elog is not None:
print(f"entries: {len(elog)}")
for n, prev, cur in elog[-30:]:
print(f" insn#{n} {prev:#x} -> {cur:#x}")
for n, prev, cur, th in elog[:10]:
if cur < 0:
print(f" FIRST EXIT insn#{n} {prev:#x} -> {(-cur):#x}")
else:
print(f" FIRST insn#{n} {prev:#x} -> {cur:#x}{'t' if th == 1 else ('a' if th == 0 else '?')}")
for n, prev, cur, th in elog[-10:]:
if cur < 0:
print(f" LAST EXIT insn#{n} {prev:#x} -> {(-cur):#x}")
else:
print(f" LAST insn#{n} {prev:#x} -> {cur:#x}{'t' if th == 1 else ('a' if th == 0 else '?')}")
if _splog is not None:
print(f"sp-highs: {len(_splog)}")
for n, pc, sp in _splog:
@@ -485,6 +680,12 @@ def main():
print(f"bl-immed: {len(bls)}")
for pc, tgt in bls[-30:]:
print(f" {pc:#x}: bl #{tgt:#x}")
pops = [(pc, tgt) for pc, rm, tgt in calls if rm == 300]
print(f"pop-pc: {len(pops)}")
for pc, tgt in pops[:15]:
print(f" FIRST {pc:#x}: pop-> {tgt:#x}" if tgt >= 0 else f" FIRST {pc:#x}: pop-> ?")
for pc, tgt in pops[-15:]:
print(f" LAST {pc:#x}: pop-> {tgt:#x}" if tgt >= 0 else f" LAST {pc:#x}: pop-> ?")
for pc, rm, tgt in calls[-12:]:
if rm == 200:
continue